1. Field of the Invention
The present invention relates to a multilayer circuit board for a semiconductor device and a method for producing the same, particularly to a multilayer circuit board using an anisotropic electro-conductive adhesive layer and a method for producing the same.
2. Description of the Related Arts
When circuit patterns are formed in a multilayer manner while using substrates made of BT resin or the like, in general, the circuit patterns in the respective layers are electrically connected to each other via through-holes drilled through the laminated substrates and plated on the inner wall thereof with an conductive metal. FIG. 7 illustrates a circuit board formed by laminating resinous substrates 60. A through-hole 62 is bored through the resinous substrates 60, and a plated layer (for example, copper) 64 is formed on the inner wall thereof to electrically connect circuit patterns 66 on the respective layers with each other.
As described above, when the multilayer circuit board is produced, processes for forming the through-hole 62 and plating the inner wall of the through-hole 62 are necessary after the resinous substrates 60 are laminated and bonded together, which results in the lowering of production efficiency of the circuit board. Also, according to the above method wherein the plated layer 64 is formed on the inner wall of the through-hole to electrically connect the same with the circuit patterns 66 in the respective layers, it is necessary to ensure the spread of a plating solution all over the inner wall of the through-hole 62, and therefore, there is a limit in the reduction of a diameter of the through-hole. Generally, the lower limit of the diameter of the through-hole is about 0.3 mm, and the further integration of circuit patterns 66 is impossible.
To solve the above problems, Japanese Unexamined Patent Publication (Kokai) No. 7-94868 discloses a multilayer circuit board wherein circuit patterns in the respective layers are electrically connected with each other by using the electrical conductivity of an anisotropic electro-conductive adhesive. Such a multilayer circuit board is shown in FIG. 8, wherein a circuit pattern 72 is provided on one surface of a first substrate 70, and a connection land 74 is provided on the other surface thereof. When the first substrate 70 is bonded to a second substrate 70a having the same structure as that of the first substrate 70 by an anisotropic electro-conductive adhesive 80, the connection land 74 is electrically connected to a circuit pattern 72 provided on the second substrate 70a via electro-conductive particles 80a dispersed in the anisotropic electro-conductive adhesive 80. In this regard, the electrical connection between surfaces of the respective substrate 70, 70a, that is, that between the circuit pattern 72 and the connection land 74 is achieved by a through-hole 76 provided through the respective substrate 70, 70a in the thickness direction and filled with an electro-conductive paste 78.
The anisotropic electro-conductive adhesive 80 is used for bonding the substrates 70 and 70a with each other and is composed of a thermoplastic adhesive matrix having an electro-insulating property mixed with electro-conductive particles such as solder, and has a characteristic in that it becomes partially electro-conductive at a portion when it is pressed from both sides to evacuate the electro-insulating matrix therefrom, while maintaining the electro-insulating property in other portions.
However, since it is necessary to electrically connect the circuit patterns 72 provided on the upper and lower surfaces of the respective substrates 70 and 70a with the lands 74 as described above when the multilayer circuit board is formed while using the anisotropic electro-conductive adhesive 80, there is a problem in that processes are required for forming through-holes 76 in the substrates and for filling the electro-conductive adhesive 78 therein, resulting in the lowering of production efficiency.
Also, there has been still another problem in that the high density arrangement of circuit patterns 72 is restricted because of the through-holes 76.